Allegro MicroSystems ACSEVB-LH5 Bare Evaluation Board

Allegro MicroSystems ACSEVB-LH5 Bare Evaluation Board is compatible with the ACS37041 integrated Hall-effect current sensor IC and LH (SOT23-W 5) package. This board offers improved thermal performance and heat dissipation enabling precise measurements. The ACSEVB-LH5 evaluation board features a flexible layout for user-installed connection points. This evaluation is used in applications such as clean energy micro inverters, industrial motor drivers, and personal mobilities.

Features

  • Improved thermal performance:
    • 6-layer PCB with 2 oz copper weight on all layers
    • Nonconductive-filled via-in-pad
    • High-performance FR4 material with 180° glass transition temperature
  • Allows measurement of integrated current loop resistance after test point installation
  • Flexible layout for user-installed connection points:
    • 2-pin headers
    • SMA/SMB connector
    • Standard keystone test points
  • Includes in-pad vias

Applications

  • Industrial motor drivers (<100V)
  • Clean energy string inverter (optimizer)
  • Clean energy micro-inverter
  • Personal mobilities:
    • E-bikes
    • E-scooters

Board Description

Allegro MicroSystems ACSEVB-LH5 Bare Evaluation Board

1) U1 is an LH package footprint (pin 1 is on the bottom left side of the package footprint, the small white dot to the left of the package footprint).

2) U1 pins (5 to 3) allow the option to connect:

RPU - Pull-up resistor to VCC
RPD - Pull-down resistor to GND
C - Decoupling or load capacitor to GND

3) Optional through hole test points (keystone 5005 test points)

4) Optional standard SMB or SMA connection points

5) Optional 2-pin 100mil header connector (note - either SMB or header can be assembled)

6) Primary current cables mounting positions (positive current flow direction is left to right)

7) Optional 2-pin 100mil header connector for voltage drop measurement across the integrated current loop of the current sensor

8) RB1, RB2, RB3, and RB4 rubber bumper mounting positions

Schematic Diagram

Schematic - Allegro MicroSystems ACSEVB-LH5 Bare Evaluation Board
Published: 2025-02-12 | Updated: 2025-05-09